ERC Develops New Memory Device to Enable Storing Information on Extremely Small Nanocrystals

Achievement date: 
2017
Outcome/accomplishment: 

Researchers at the NSF-funded Nanosystems Engineering Research Center (NERC) for Translational Applications of Nanoscale Multiferroic Systems (TANMS), headquartered at UCLA, have developed a new type of magnetoelectric memory device that represents a greater than 10x improvement in both write energy efficiency as well as scalability. A major recent driver of this accomplishment is the researchers' progress in advancing a technology known as voltage-controlled magnetic anisotropy (VCMA), which can enable writing of information on extremely small nanocrystals. Researchers have observed electric-field control of magnetization (required to write information) in both 9 nm and 5 nm diameter iron palladium (FePd) nanocrystals—5 nm being the smallest in which voltage control of magnetization has been seen.    

Impact/benefits: 

This work is a huge step toward satisfying current large demands for fast, low-power-consumption memory systems as well as needs for high storage densities (and correspondingly small bit sizes) in memory systems for personal electronic devices. The VCMA advances show promise in overcoming one of the major stumbling blocks in achieving high densities. That block is low efficiencies, which produce excessive heating, thereby preventing further miniaturization in consumer electronics. The VCMA results, combined with 2015’s demonstration of a 20x reduction in write energy, provide a new pathway toward energy-efficient, small-computing technologies. 

Explanation/Background: 

The TANMS work described here shows that control of magnetization with an electric field is feasible in nanocrystal-based systems. This achievement creates a clear roadmap to a low-power-consumption, high-storage-density, universal memory system with a 5-nm bit size (see figure), which is significant considering that the state-of-the-art in the semiconductor industry is 14-nm transistors with 10-nm technology on the horizon. The historical industrial scaling rate suggests that 5-nm bit sizes are expected to be at least 6-8 years away. Hence, in addition to providing memory solutions (demonstrated in the TANMS 1 Kb testbed in 2015) for current industry needs, a roadmap and candidate solution at technology nodes well beyond the state of the art now exists.

To achieve higher storage densities (i.e., densities approaching 1.5 Tbits/in2) increasingly small bit sizes are required that are energy efficient. Conventional fabrication methods require post-patterning of blanket films into individual bits, but these patterning techniques have intrinsic limitations,  thus limiting the smallest attainable bit size. Nanocrystals overcome this limitation because they are synthesized with the desired dimensions and do not require further patterning. Until now, nanocrystal-based memory and VCMA-based switching have not been considered together.