[an NSF Graduated Center] A System Scaling Center for Smart, Wearable, IOT, Bio-electronics, Automotive and High-performance Systems The Georgia Tech 3D Systems Packaging Research Center (PRC) is unique in three ways. It goes beyond the traditional exploratory research by faculty and graduate students to an integrated, interdisciplinary and system level approach with particular focus on: 1) leading-edge electronic and bio-electronic systems research, 2) cross-discipline education of large number of graduate and undergraduate students, and 3) industry collaborations with more than 50 companies from the U.S., Europe, Japan, Korea, Taiwan and China, all in one transformative systems technology called System Scaling to nanoscale leading to the entire System-On- one single Package (SOP), being pioneered by the Center. In research, it is pioneering System-on-Package (SOP) in contrast to system-on-chip that ends up with system-on-a bulky board with other components. Such a concept is expected to revolutionize ultra-miniaturized consumer electronics and bio-electronics systems such as smartphones, wearable, Internet of Things (IOTs), miniaturized electronics as well as ultra-high performance computing systems. This is due to the fact that the fundamentals of system scaling of components to nanoscale and ultra-short interconnections between these and active devices leads to higher performance as well as lower power dissipation in the interconnections, as a result of ultra-short interconnections; lower cost as a result of large panel processing; improved functionality as a result of SOP integration; and improved reliability as a result of matched TCEs or compliant interconnections at all levels. As these system scaling technologies are explored, developed and designed with nanoscale components, smart systems such as smartphones are expected to trend to mega-functional systems at lowest cost in smallest size that every global person could afford. These systems using system scaling technologies will perform dozens of functions that include Wireless Electronics, Healthcare Electronics, Wearable Electronics, Sensor Electronics, Camera Electronics, 5G and mm-wave Electronics, Digital Electronics, MEMS Electronics, Photonics, Analog Electronics, Power Electronics and automotive electronics that include all these and many others. In education, PRC strives to educate globally-competitive and interdisciplinary individuals with knowledge not only in electrical, mechanical, thermal, materials and chemical sciences and engineering but also in theoretical and hands-on practical knowledge, and in addition, learn about industry culture by virtue of every PRC graduate student collaborating with one or more of global PRC member companies. The PRC students therefore are unique as they learn science, technology, manufacturing, business, economics, foreign culture and develop leadership skills. In global industry collaborations, the PRC collaborates in co-development mode with global companies in materials, tools, processes, semiconductors, packaging, assembly, board and system companies; developing new technologies and transferring both the new technologies and the educated engineers to provide a path for commercialization of SOP-based PRC-developed technologies. --- Transistor scaling, starting with the invention of transistor in 1949, made electronics the largest single, $1.5T global industry, serving a variety of individual industries that span computing, communications, consumer, automotive and others. The basis for this industry is a result of singular focus in transistor scaling, leading to a 5B transistor chip, involving dozens of semiconductor, component and systems companies around the globe. But the electronics landscape has begun to change dramatically since 2007, driven by a new industry that integrates all these individual industries into so-called “Smart Mobile and Wearable Systems” that promise to perform every imaginable function, as shown in Figs. 1(a), (b), and (c), in smallest size and lowest cost that every global person could afford. Such a new frontier, however, requires revolutionary technologies referred to as System Scaling, in addition to transistor scaling during the last 60 years as shown in Fig. 2 which illustrates the gap between Transistor Scaling and System Scaling. Smart mobile systems are expected to drive unparalleled electronics hardware and software technology paradigms in system miniaturization, functionality, and cost. The system scaling technologies are many that need to be explored, developed, integrated, interconnected, tested and commercialized. This is the technical vision of Georgia Tech PRC.
Research Areas
Core Technologies
1. Design
2. Materials
3. Devices
4. Electronic Substrates
5. Photonic Substrates
6. High-temp Electronics
7. Power Electronics
8. Sensing Electronics
9. RF and mm-Wave Electronics
10. EMI Design & Materials
11. Interconnections & Assembly
D&D Test Vehicles :
Communication Electronics
- Electronics
- Photonics
- mm-Wave
Power Electronics
Sensor Electronics
Sub-System Integration
SOP System on Package
Facilities & Resources
The Packaging Research Center at Georgia Tech is the only university in the academic world with a 300 mm cleanroom package and assembly facility capable of producing leading-edge multi-functional interposers and packages from design to prototypes. The labs were installed at a cost of more than $40M USD. It houses a 300mm substrate fabrication facility, assembly facility, materials research labs, electrical test asreas, and environmental testing facilities. The research labs serve to enable cutting-edge research in core areas of advanced packaging technologies encompassing the complete breadth from fundamental research to functional design and demonstration test vehicles to complete engineered systems. In addition, they serve a critical role in supporting hands-on-education, graduate research and industry research projects alike. Other fee-based, access-labs available for research on campus include research labs within the Institute for Electronics and Nanotechnology of which the Packaging Research Center is a member. These labs consist of high frequency electrical testing in the Georgia Electronics Design Center, baseline materials growth processes in the Microelectronics Research Center, and physical inspection equipment in the Nanotechnology Research Center. Researchers within the Packaging Research Center consist of undergraduate students, graduate students, post-doctoral fellows, faculty researchers, research engineers, and visiting industry engineers. Strategy To offer a continuum of labs from academic blue-sky research to industry- mentored applied research and development, as well as hands-on educational programs, the Center offers a comprehensive Lab-to-Fab capability unlike any other academic environment. By implementing a tiered approach to its laboratory structure that includes Fundamental, Small Scale Integration, and Large Area Integration test bed and prototype laboratories, the Center is able to effectively carry out its basic research, education, and technology-transfer missions. Laboratory Capabilities SOP Substrate & Systems Integration Lab This is a class 1,000 clean room facility maintained at 68F and relative humidity of 35%. This test bed and prototype research laboratory enables the processing of 300 mm substrates and interposers such as organic, glass, flex, ceramics and silicon with via formation and metallization, high density wiring (HDW), embedded and integral passive components. Process capabilities in this laboratory include substrate cleaning and preparation, polymer deposition of wet films, polymer deposition of dry films via roll or vacuum lamination, soft bake and final film curing, full field photolithographyfor feature development, and feature inspection and characterization, both electrolytic and electroless copper plating for build-up, gold, nickel and solder for surface finish, which enable metallization of substrates to the parameters defined in PRC's research program. Equipment includes: * Drawer Vacuum Laminator * Full Field Exposure System * Projection Lithography * Nitrogen Purge Ovens * Optical Microscopes * Stylus and Non-contact Surface Profilers * Chemical Processing Hoods * Electro/Electroless Plating System * Horizontal Spray Develop/Strip/Etch Systems * Dry/Cure Ovens * Large Area Spin Coaters * Large Area Spin/Rinse/Dry * Electrical Characterization Probe Station / 4 Point Measurement * Plasma Surface Preparation SOP Assembly & Reliability Lab The SOP Module Assembly Laboratory provides a class 100,000 environment enabling the research and process integration needed to assemble functional sub-system test vehicles. In this laboratory, substrates processed in the SOP Substrate Fabrication are assembled into a complete sub-system prior to environmental reliability, electrical and functional testing. Current process capabilities of this facility include precision stencil printing, thermocompression bonding, wirebonding, solder reflow, precision chip and component placement and bonding by various techniques, component and substrate inspection via X-ray and acoustical measurement, materials dispense, reliability testing, and material and process characterization. Tools in this lab include: * Semiautomatic Flip Chip Bonding * Automated Flip Chip Bonding * Thermal Bake Ovens * Xray Inspection * Optical Measurement of Features * Waterjet Cutting * BGA Reworks * Sonoscan CSAM * Semiautomated Screen Printing * Die Shear Testing * Wire Bonding * Liquid to Liquid Shock * Air to Air Shock and Cycling * HAST Testing * Nitrogen Atmosphere Solder Reflow * Warpage Characterization Industry Materials, Tools, Software and Process Service Support The PRC encourages industry participation in Infrastructure support. These include: * Infrastructure Partnership – on a consignment basis, and working with industry, the PRC Testbed and Prototype laboratories offer companies a mechanism to apply their materials, tools, and process services to create leading-edge, next-generation prototypes, enabling industry to understand the future needs and demonstrate their infrastructure capabilities. * By providing highly discounted purchases for unique critical equipment – in situations where budgets permit, the Center funds critical equipment purchases which can be included during the proposal submission process * Supply Chain Membership in Research Consortia - companies can offset a portion of membership costs with “In-kind” support of program critical materials, tools, software, and process services.
Partner Organizations
Georgia Institute of Technology
Abbreviation |
PRC
|
Country |
United States
|
Region |
Americas
|
Primary Language |
English
|
Evidence of Intl Collaboration? |
|
Industry engagement required? |
Associated Funding Agencies |
Contact Name |
Madhavan Swaminathan
|
Contact Title |
Director
|
Contact E-Mail |
madhavan.swaminathan@ece.gatech.edu
|
Website |
|
General E-mail |
|
Phone |
(404) 894-9097
|
Address |
813 Ferst Drive, NW
Calloway Manufacturing Building / Manufacturing Institute R…
Atlanta
GA
30332
|
[an NSF Graduated Center] A System Scaling Center for Smart, Wearable, IOT, Bio-electronics, Automotive and High-performance Systems The Georgia Tech 3D Systems Packaging Research Center (PRC) is unique in three ways. It goes beyond the traditional exploratory research by faculty and graduate students to an integrated, interdisciplinary and system level approach with particular focus on: 1) leading-edge electronic and bio-electronic systems research, 2) cross-discipline education of large number of graduate and undergraduate students, and 3) industry collaborations with more than 50 companies from the U.S., Europe, Japan, Korea, Taiwan and China, all in one transformative systems technology called System Scaling to nanoscale leading to the entire System-On- one single Package (SOP), being pioneered by the Center. In research, it is pioneering System-on-Package (SOP) in contrast to system-on-chip that ends up with system-on-a bulky board with other components. Such a concept is expected to revolutionize ultra-miniaturized consumer electronics and bio-electronics systems such as smartphones, wearable, Internet of Things (IOTs), miniaturized electronics as well as ultra-high performance computing systems. This is due to the fact that the fundamentals of system scaling of components to nanoscale and ultra-short interconnections between these and active devices leads to higher performance as well as lower power dissipation in the interconnections, as a result of ultra-short interconnections; lower cost as a result of large panel processing; improved functionality as a result of SOP integration; and improved reliability as a result of matched TCEs or compliant interconnections at all levels. As these system scaling technologies are explored, developed and designed with nanoscale components, smart systems such as smartphones are expected to trend to mega-functional systems at lowest cost in smallest size that every global person could afford. These systems using system scaling technologies will perform dozens of functions that include Wireless Electronics, Healthcare Electronics, Wearable Electronics, Sensor Electronics, Camera Electronics, 5G and mm-wave Electronics, Digital Electronics, MEMS Electronics, Photonics, Analog Electronics, Power Electronics and automotive electronics that include all these and many others. In education, PRC strives to educate globally-competitive and interdisciplinary individuals with knowledge not only in electrical, mechanical, thermal, materials and chemical sciences and engineering but also in theoretical and hands-on practical knowledge, and in addition, learn about industry culture by virtue of every PRC graduate student collaborating with one or more of global PRC member companies. The PRC students therefore are unique as they learn science, technology, manufacturing, business, economics, foreign culture and develop leadership skills. In global industry collaborations, the PRC collaborates in co-development mode with global companies in materials, tools, processes, semiconductors, packaging, assembly, board and system companies; developing new technologies and transferring both the new technologies and the educated engineers to provide a path for commercialization of SOP-based PRC-developed technologies. --- Transistor scaling, starting with the invention of transistor in 1949, made electronics the largest single, $1.5T global industry, serving a variety of individual industries that span computing, communications, consumer, automotive and others. The basis for this industry is a result of singular focus in transistor scaling, leading to a 5B transistor chip, involving dozens of semiconductor, component and systems companies around the globe. But the electronics landscape has begun to change dramatically since 2007, driven by a new industry that integrates all these individual industries into so-called “Smart Mobile and Wearable Systems” that promise to perform every imaginable function, as shown in Figs. 1(a), (b), and (c), in smallest size and lowest cost that every global person could afford. Such a new frontier, however, requires revolutionary technologies referred to as System Scaling, in addition to transistor scaling during the last 60 years as shown in Fig. 2 which illustrates the gap between Transistor Scaling and System Scaling. Smart mobile systems are expected to drive unparalleled electronics hardware and software technology paradigms in system miniaturization, functionality, and cost. The system scaling technologies are many that need to be explored, developed, integrated, interconnected, tested and commercialized. This is the technical vision of Georgia Tech PRC.
Abbreviation |
PRC
|
Country |
United States
|
Region |
Americas
|
Primary Language |
English
|
Evidence of Intl Collaboration? |
|
Industry engagement required? |
Associated Funding Agencies |
Contact Name |
Madhavan Swaminathan
|
Contact Title |
Director
|
Contact E-Mail |
madhavan.swaminathan@ece.gatech.edu
|
Website |
|
General E-mail |
|
Phone |
(404) 894-9097
|
Address |
813 Ferst Drive, NW
Calloway Manufacturing Building / Manufacturing Institute R…
Atlanta
GA
30332
|
Research Areas
Core Technologies
1. Design
2. Materials
3. Devices
4. Electronic Substrates
5. Photonic Substrates
6. High-temp Electronics
7. Power Electronics
8. Sensing Electronics
9. RF and mm-Wave Electronics
10. EMI Design & Materials
11. Interconnections & Assembly
D&D Test Vehicles :
Communication Electronics
- Electronics
- Photonics
- mm-Wave
Power Electronics
Sensor Electronics
Sub-System Integration
SOP System on Package
Facilities & Resources
The Packaging Research Center at Georgia Tech is the only university in the academic world with a 300 mm cleanroom package and assembly facility capable of producing leading-edge multi-functional interposers and packages from design to prototypes. The labs were installed at a cost of more than $40M USD. It houses a 300mm substrate fabrication facility, assembly facility, materials research labs, electrical test asreas, and environmental testing facilities. The research labs serve to enable cutting-edge research in core areas of advanced packaging technologies encompassing the complete breadth from fundamental research to functional design and demonstration test vehicles to complete engineered systems. In addition, they serve a critical role in supporting hands-on-education, graduate research and industry research projects alike. Other fee-based, access-labs available for research on campus include research labs within the Institute for Electronics and Nanotechnology of which the Packaging Research Center is a member. These labs consist of high frequency electrical testing in the Georgia Electronics Design Center, baseline materials growth processes in the Microelectronics Research Center, and physical inspection equipment in the Nanotechnology Research Center. Researchers within the Packaging Research Center consist of undergraduate students, graduate students, post-doctoral fellows, faculty researchers, research engineers, and visiting industry engineers. Strategy To offer a continuum of labs from academic blue-sky research to industry- mentored applied research and development, as well as hands-on educational programs, the Center offers a comprehensive Lab-to-Fab capability unlike any other academic environment. By implementing a tiered approach to its laboratory structure that includes Fundamental, Small Scale Integration, and Large Area Integration test bed and prototype laboratories, the Center is able to effectively carry out its basic research, education, and technology-transfer missions. Laboratory Capabilities SOP Substrate & Systems Integration Lab This is a class 1,000 clean room facility maintained at 68F and relative humidity of 35%. This test bed and prototype research laboratory enables the processing of 300 mm substrates and interposers such as organic, glass, flex, ceramics and silicon with via formation and metallization, high density wiring (HDW), embedded and integral passive components. Process capabilities in this laboratory include substrate cleaning and preparation, polymer deposition of wet films, polymer deposition of dry films via roll or vacuum lamination, soft bake and final film curing, full field photolithographyfor feature development, and feature inspection and characterization, both electrolytic and electroless copper plating for build-up, gold, nickel and solder for surface finish, which enable metallization of substrates to the parameters defined in PRC's research program. Equipment includes: * Drawer Vacuum Laminator * Full Field Exposure System * Projection Lithography * Nitrogen Purge Ovens * Optical Microscopes * Stylus and Non-contact Surface Profilers * Chemical Processing Hoods * Electro/Electroless Plating System * Horizontal Spray Develop/Strip/Etch Systems * Dry/Cure Ovens * Large Area Spin Coaters * Large Area Spin/Rinse/Dry * Electrical Characterization Probe Station / 4 Point Measurement * Plasma Surface Preparation SOP Assembly & Reliability Lab The SOP Module Assembly Laboratory provides a class 100,000 environment enabling the research and process integration needed to assemble functional sub-system test vehicles. In this laboratory, substrates processed in the SOP Substrate Fabrication are assembled into a complete sub-system prior to environmental reliability, electrical and functional testing. Current process capabilities of this facility include precision stencil printing, thermocompression bonding, wirebonding, solder reflow, precision chip and component placement and bonding by various techniques, component and substrate inspection via X-ray and acoustical measurement, materials dispense, reliability testing, and material and process characterization. Tools in this lab include: * Semiautomatic Flip Chip Bonding * Automated Flip Chip Bonding * Thermal Bake Ovens * Xray Inspection * Optical Measurement of Features * Waterjet Cutting * BGA Reworks * Sonoscan CSAM * Semiautomated Screen Printing * Die Shear Testing * Wire Bonding * Liquid to Liquid Shock * Air to Air Shock and Cycling * HAST Testing * Nitrogen Atmosphere Solder Reflow * Warpage Characterization Industry Materials, Tools, Software and Process Service Support The PRC encourages industry participation in Infrastructure support. These include: * Infrastructure Partnership – on a consignment basis, and working with industry, the PRC Testbed and Prototype laboratories offer companies a mechanism to apply their materials, tools, and process services to create leading-edge, next-generation prototypes, enabling industry to understand the future needs and demonstrate their infrastructure capabilities. * By providing highly discounted purchases for unique critical equipment – in situations where budgets permit, the Center funds critical equipment purchases which can be included during the proposal submission process * Supply Chain Membership in Research Consortia - companies can offset a portion of membership costs with “In-kind” support of program critical materials, tools, software, and process services.
Partner Organizations
Georgia Institute of Technology